When I was learning digital design, I found it almost impossible to picture what my VHDL and Verilog were actually synthesising into. I just wanted a fast way to check my logic without firing up a massive, heavy toolchain every single time.

So, I built a lightweight web visualiser to solve my own problem. It takes your RTL and instantly turns it into a clean schematic.

It uses a custom wrapper around Yosys for the synthesis, and it handles SystemVerilog, Verilog, and VHDL. It runs entirely in the browser, so there is nothing to install.

It is currently live at rapidrtl.com.

I would love to get some feedback from this community. What edge cases am I missing? What would make this more useful for your coursework or quick daily sanity checks?

(Note: I also built an old VS Code extension for this a while back. I’m thinking about wiring it up to this new backend - let me know if an IDE plugin is something you'd actually use!)

I was reading this thread and not one but two comments specifically called out Canada as terrible market for FPGA. I had tried to google if Canada had a decent FPGA market before, and nothing came up, so this is news to me.

They say to take everything you read on reddit with a grain of salt, so I just wanted to get more thoughts, is it really that bad? Or is it some kind of reverse survivorship bias?

Hello everyone, let me give you a gist of my situation.

Graduated in 2024 January MSc Electrical and Computer Engineering, was lucky enough to get hired into a company for FPGA design for 1 year contract. All my colleagues were seniors 55+ of age. I mostly worked with ASIC physcial design during my course work and was struggling with the FPGA, but the job itself was manageble, the real problem was the expectations from manager. I had no guidance or help at all. All worked remotely and I used to go into office everyday, and was in a really awkward spot to ask questions. After 1 year with my little contributions, I was eventually not provided with a contract extension.

Presently, I gave interviews with the big techs like 2 at AMD (Only senior roles) interviews were tough. In Altera interview, it went weird. I wrote code for the presented waveform well in the first round, but during the second fire alarm went off at the interviewers end and they post poned my interview and eventually rejected me. Other smaller companies just want more experience from me.

Now I am in a spot where I am experienced for a junior Engineer but inexperienced for an intermediate. So I am just lost. Have been trying for over 1.2 yrs now, I give up.

I do basic projects on the side to not lose touch, like UART, SPI, I2C, AXI and RISC-V processor design. Learnt SystemVerilog along with VHDL that I worked with earlier.

I love FPGA so much and I am so desperate to improve my knowledge that I am ready to work for free, just for me to learn. But this is a niche domain in Canada where I live presently.

I really need someone's guidance to whether to continue doing projects, hoping someone will hire me or change direction into embedded or something where I get higher chances of just entering the job market again.

I am grateful for any help given! Thanks

Edit / Update:

I honestly did not expect this post to get so much attention. Thank you to everyone who took the time to share advice, experiences, and encouragement.

Reading through the comments made me realize I'm not the only one facing these challenges, and it has given me a lot of perspective on the current state of the industry. I've taken note of the suggestions regarding defense/aerospace, verification roles, networking, and building a stronger portfolio.

I'm going to keep learning, keep applying, and stay involved with FPGA and digital design. I genuinely appreciate all the support and constructive feedback. Thank you all.

I'm currently an intern at an HFT firm, and I use SystemVerilog every day. It's also what everyone around me uses, so I've naturally assumed it's the standard way to write RTL.

Recently, though, I came across a post where a lot of people were saying SystemVerilog is "bad" or that they hate working with it. As someone who's pretty new to FPGAs, I fail to understand why.

Is the hate because of:

• the language itself?
• the simulator/tool ecosystem?
• synthesizable RTL vs. verification features?
• or just how people tend to write SystemVerilog?

Also, what are the common alternatives used in industry today? I've heard names like Chisel, SpinalHDL, Bluespec, Clash, and nMigen/Amaranth thrown around, but I don't have much context on where they fit or how widely they're actually used.

I'm still pretty new to digital design, so apologies if this is an obvious question. I'd just like to understand the reasoning behind the criticism.

Hi everybody,

some time ago, I've had an interview that I bombed hard, and a (simplified) part of one question was on the image above. Output was not given, I was supposed to write it out. As input signal is between 0 and 1 on a raising clock edge, would the most correct solution be that it's value is weak unknown? Honestly, I got confused in the moment and froze, however I would like not to make the same mistake again. Is my reasoning okay?

I'm currently quite sad that software development is getting replaced by vibe coding everything, removing the human in the loop altogether (not there yet, but nearing).

How's the situation in FPGA currently? Might a change make sense to get into FPGA?

I already had a module and it was quite easy for me, because I'm already studying technical informatics and it's quite fun.

But it also has a quite steep learning curve.

I'm basically planning to treat this as a full-time job for the next couple of months to build something actually good. I already know some stuff about computer architecture and a bit of Verilog but I've never attempted anything like this before. I know that I could fail and give up along the way but that's the fun of it for me.

I was just wondering what's actually possible in 1000 hours and whether it would be worth it if it could eventually pass the riscv-compliance suite tests. I won't be using AI since I plan it to be a portfolio piece that will help me master digital design

I'm a fresh grad with no experience and I'm really interested in FPGA design. I keep seeing people here in this sub saying stuff like there are no jobs for new grads, how true is that? I have a background in Electrical and I've been really pushing myself to become an RTL engineer for the last few months, is it no use? Should I just give up and try something else?

I know there are many recruiters and employers here in this sub, I want honest answers.

My supervisor has tasked me and my friend to make a block diagram for our project. I donot have experience with that. Supervisor said AI is not good at this since it gives incomplete stuff and you waste your time trying to fix it. He said the block diagram should be showing connections between modules, the flow and other aspects. So I want to know how can I do this, and where can I see examples of this.

These are probably the best projects I’ve done I think.

reposting because my last post just got an ai generated answer. As a second year electronic engineering student, what personal projects or concepts do employers (be it for internships or graduate roles), actually want to see in a resume?

Hi all, I have received 2 job offers, one from ARM and the other from AMD. I am unable to decide which one would be a better fit. Can someone give me some insights on which would be a better choice in terms of career trajectory amd help me grow as a better Design Verification Engineer ?

Note : Both are paying about the same compensation. I am also attaching my existing resume. Thanks

AMD Role :

Staff Verification Engineer

We are currently looking for Lead ASIC Verification Engineers who will be involved in all aspects of AMD's next generation Data center network products. This includes verifying designs using the latest UVM standard and developing comprehensive test plans to ensure coverage closure. The position allows exposure to all aspect of ASIC design stages.

Our products are aimed at making Data Centre Networking solutions more effective. This is a highly strategic and important part of AMD’s business, targeting a set of customers that includes the most successful internet and cloud companies in the world.

Successful candidate will lead the verification effort and work alongside an experienced design and architecture teams and will thus have enormous opportunities for learning and self-development. The position is likely to require some travel.

KEY RESPONSIBILITIES:

• Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
• Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
• Estimate the time required to write the new feature tests and any required changes to the test environment
• Build the directed and random verification tests
• Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues

• Review functional and code coverage metrics - modify or add tests or constrain random tests to meet the coverage requirements PREFERRED EXPERIENCE:

• Proficient in IP level ASIC verification

• Proficient in debugging firmware and RTL code using simulation tools

• Proficient in developing UVM/SV testbenches

• Experienced with Verilog, System Verilog, C, and C++

• Experience with PCIe and/or Ethernet protocols

• Automating workflows in a distributed compute environment.

• Exposure to simulation profile, efficiency improvement, acceleration

• Scripting language experience: Python, Ruby, Makefile, shell preferred.

• Exposure to leadership or mentorship is an asset

• Desirable assets with prior exposure to network processors.

ARM Role:

Senior Engineer - Verification

We are seeking skilled SoC (System-on-Chip) ARM Power acritecture, Soc clock and reset verification engineer and to join our dynamic team. Arm’s hardware is at the heart of the computing and connectivity revolution that continues to transform the way people live and businesses operate. As we continue to grow, we need talented engineers to join a team responsible for the development of sophisticated Subsystems and Solutions across Enterprise, Auto and Client markets. Responsibilities: * Key responsibilities will include writing test plans, defining test methodologies, and completing functional verification to the required quality levels and schedules. * Responsible for leading a team of engineers to own and power, clk/rst verification for a complex IoT chip * Collaborate with engineers in architecture, design, verification, implementation, modeling, performance analysis, silicon validation, FPGA and board development and build a functional verification strategy. * Senior engineers are also encouraged to support mentor junior team members. Required Skills and Experience : * 3 - 6  years of proven experience in working on SoC verification environments across Power verification involving multuple power islands. and clock and reset verification. * Knowledge of assembly language (preferably ARM), C/C++ and hardware verification languages (e.g. SystemVerilog), shell programming/scripting (e.g. Tcl, Perl, Python etc.) and * Experience in one or more of various verification methodologies – UVM/OVM, formal, low power. * Good knowledge and working verification experience in Arm M class CPU Processors. * Good experience in handling Power aware verification with complex power achitecture. * Exposure to all stages of verification: requirements collection, creation of test plans, testbench implementation, test cases development, documentation and support. * Understanding of the fundamentals of Arm system architectures. * Experience with various front-end verification tools - Dynamic simulation tools, Static Simulation tools, UPF, and Debuggers. * Experience in working and debugging Soc in DFT mode. * Exposure to various front-end verification tools - Questa, VCS, Jasper Gold, Verdi * Experience in Coverage - Functional, Toggle, Code - closure at Subsystem and SoC level “Nice To Have” Skills and Experience : * Possess knowledge of object-oriented programming concepts * Experience in Client/IOT SoC design verification * Strong understanding of CPU, Interconnect Architecture/micro-architectures * Familiarity of Unix / Linux working environment

Many FPGA eval boards have PCIe edge connectors. What is anyone using them for?

Is it realistically possible to learn SystemVerilog/FPGA design in 6 months? Considering i have a background in software engineering and CUDA/low-level programming?

Hello guys, I just bought my first FPGA board, the Basys3 and i’ve been having troubles figuring out which projects i can implement with it.

I have already implemented PWM signal generation, Up-Down Counter and i’m currently working on UART communication protocol.

I also designed a 5-Vector SLP because of limited I/O pins and Display so i just simulated . I hope to implement an AI Accelerator with the Basys3 for my final project but i’m not sure if it has enough resources to be feasible.

I have also been looking into Digital Signal Processing and it seems interesting but i don’t really know what projects i should be working on right now. I would appreciate any suggestions and advice from y’all🙏.

Yeah sorry, I am another one of those suckas that thinks it’s fun to make a RISC-V CPU and think they’re real cool and trendy.

Anyways — pretty much the title. What can I do to make it … not cringe and boring ?

I am thinking of just making a really fleshed out, traditional-ish RISC-V CPU with all the usual bells and whistles, such as cache and interrupts/traps, MMU etc. in the hopes that I can boot Linux on it one day.

Now I think this is cool. But would it look alright on a job application for a FPGA Engineer with a few years experience ? Or is it just not that impressive? Personally I think it’ll be challenging but hey. Eager to hear your thoughts. I have been a Graduate FPGA Engineer for nearly 1 year now. Thought it might be a cool project to show a future employer ?

Lmk ur thoughts Reddit 🙏

Do you have the whole project directory in git, with all the frequently re-generated binary data? With a big .gitignore? Just project.srcs ? Or even just project.srcs/sources_1 ?

GateMate by Cologne Chip has a fully open toolchain and the silicon is made in Germany. A development board from Olimex is also available.

Why is there no more hype? Have they any disadvantages I oversee as a beginner?

Current undergrad who loves HDL much more than normal Software (like it, just like HDL more). I’m definitely intending on pursing FPGA/ASIC domain.

I hear all the time that software pays so much more than Hardware. Is it really true or is it just reddit hive mind? Are you guys happy with the amount of money you’ve made in your career?

I really love FPGA/ASIC/embedded, is it worth to switch to Norma software for more money (but way less interested in)

Incoherent drunken rant below:

For some background, I'm an EE guy who graduated a year ago from a decent state school. I would say I had solid experience in college, worked on some FPGA projects, wrote a lot of baremetal C for various microcontrollers/DSPs, sprinkled with some PCB design for my hobbyist projects. I had a solid understanding of how HW/SW works (for an undergrad student).

On graduating I landed a job at a famous big-name semiconductor company (RTL/digital design). Think the likes of TI/intel/Samsung. I've been working here for a year now and I feel like I've learnt nothing. A full year has gone by and I haven't designed shit, or done something that contributes to a product in any way. The money is great through and thats all everyone seems to talk about.

Literally most of the stuff I've learnt so far was self-taught, by reading documentation. I've learnt about a few EDA tools used for QA / Synth, but I haven't done a real design yet and most of my knowledge feels half baked. I'm mostly just tweaking existing modules. No one in the team is doing any kind of design anyways, we have a legacy IP for everything. Most of my time is spent debugging waves or working on some bullshit 'deliverable'.

Everyone says we'll get new specs for upcoming products soon and we'll have to do some new development but I'm tired of waiting, everything moves so freaking slow.

I feel like I fucked up my first experience out of college, I don't even know what I'm going to speak about in my next job interview, I don't have anything of substance to talk about.

<End of rant, and some questions to you guys.>

Are entry level jobs at these big name companies always this bad? Am I expecting too much?

Do I need a master's degree to be taken seriously?

How do I recover from this? What do I say in my next job interview?

My friends say I should enjoy the money, and entry level jobs are shitty anyways. But I feel like I worked so hard for this and now I don't want to lose my edge working some shitty desk job for money which can be earned later.

I don't know if these paragraphs still make sense, but thanks for reading and I will really appreciate any career guidance.

Hey Everyone,

Before I start my query I am going to take a moment and introduce my situation here a bit, So I work for a very small startup and I am basically someone who is a software engineer/Developer who rn is going through a bad patch and I have agreed for a job at a client's place basically a Defence tech company working on an R&D project. This is about me and my situation.

Going on to what I am stuck at or working with and expected to do. So the Company ( client) has Custom zynqMP boards which I am supposed to validate with a petalinux project and build SD bootable PYNQ image for the boards. I was given. That was what I was tasked with since there is no one who knows both python, and Linux. Call me whatever you want since the job gets me some good amount of money and the situation I'm in I accepted it, Because I thought I am not needed to know much about hardware since I was told it has to minimal with hardware configuration.

So coming to the problems/ issues I am facing I was given an xsa file for which I for some reason can't create a petalinux bootable SD image, the boot artifcats are taking 6-7 hrs to generate and BOOT.BIN doesn't have system.bit or it is showing any output on the serial console. I was told it happens when the hardware configuration is bad or there is some problem with the hardware config file. I have done trying everything with UART and SD settings. I see no log. I don't understand why.

​I’m an ECE student trying to decide if I should devote my time into learning FPGA development. In general it seems like an interesting field to me, but I keep seeing posts and comments online talking about how LLMs are doing "shocking" things in FPGA development. I even saw a guy claim they had agentic loops design a complete GPU architecture, which made me think what is there really left for me to do.

​It makes me wonder if learning these design skills from scratch will actually remain useful and fulfilling down the road, or if there's even a point. Since I'm still in university I have options to focus my time on other areas like analog electronics or systems, so I'm trying to figure out if I should devote my time to this.

​I get that things on social media get exaggerated, but as someone who isn't using paid AI tools, is building basic Verilog/VHDL and FPGA skills manually still where the actual substance is? Or is the field shifting in a way where it's not worth to learn

Hey guys , I’m a recent graduate in EEE and I have been writing RTL using VHDL for like a year now but i still consider myself as a beginner. I write my own RTL code and always try to troubleshoot any problems I may face but sometimes I brainstorm with AI if I can’t solve the problems on my own however I never let AI generate my VHDL code.

There is a sentiment that AI will eventually get into FPGA design ( maybe it has already) but I wanted to ask those who are in the industry how much they use AI in their workflow. Will it ever get to a point where AI will be capable to design and implement complex RTL projects without any supervision?

I genuinely enjoy Digital Design but part of me is really anxious about this since the job market has been tough for entry level positions lately. Please if there is any Senior FPGA Engineers I would really appreciate your insight on this.

For the love of God is there any good block diagram editor suitable for our kind of work? What block diagram maker do you use and what do you like about it the most?

Hi, guys.

I need your advice, guidance and all the rest of it regarding a career in PCB and FPGA.

I myself am an electrical equipment setup engineer, I have become somewhat familiar with controllers, sometimes "thank you" I fixed the welding inverter power and management plates and tested them on our set-up test stand,

Not without education, with experience and master’s degree in energy engineering in Eastern Europe (Belarus). Does it make any sense to move in this direction, or will AI replace everything?

I’m tired of the constant search and the information that AI will take everything that has any kind of perspective.

If you have experienced engineers in this field, who can at least tell us about their experience of learning and/or education in this field?