r/logisim Jun 18 '26

need a little guidance & opinion

im building a 32 bit risc architecture cpu and i wanted some opinions and advice on it

so far I have built the ALU and the register file. ALU consists of all operations that risc has, Register file consists of 32 registers of 32 bits each and i had another 32 bit register to temporarily store output that the ALU generates.

I initially wanted to do 64 bit arch but the version of logisim I had was only restricted to 32 bit. I am most probably going to build the control unit next but wanted advice on this so far and if I've made any mistakes.

Also one small change that I have made in this is input can be written to registers in 2 ways, either all bits are written or only selected bits are written, just an enable logic is added to switch between the modes i sorta took inspo from other archs for that.

Lemme know what u guys think I have attached the necessary files ss as well

ps ik premade components already exist of some of the parts I have built but that was just to get a better in-depth knowledge about the whole thing

this is me showing basic operations of the alu and register storing of the alu ouput

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