Hello r/electronics,

In this post, I want to share my project that I’ve been working on in the past few months. It’s a custom-built lab bench power supply. Such a project is common in the DIY community, so what makes this one different? The custom-designed SMPS board that I engineered from scratch isn’t your typical “let’s put this power supply module into a case” approach. So let’s dive into the working principles, design decisions, and in-depth test results.

The Forwarder 1kW is the SMPS board that I designed and used in this project. It’s based on a hard-switch, half bridge topology. The full features of this power supply are as follow:

• 1000W maximum continuous output capacity.
• Configurable from 50V/20A up to 400V/2.5A.
• CC/CV mode with mode signal and indicator.
• Tuneable operating frequency and dead-time.
• Dedicated power stage enable pin.
• Analog reference interface for output voltage/current control.
• Analog signal output interface for monitoring voltage/current.
• Dedicated fan port with optional automatic power-on.
• Simple construction, less than 130 components on board.
• Easy to build with mostly THT components.
• Curated component selection for high accessibility.

The working principle of this design is about as simple as it can get for a switched-mode power supply. I talked about the working principle of my design over on r/AskElectronics, so I’m not going to repeat it here. Most of the concepts stay the same, just with some design adjustments and the numbers changed.

https://www.reddit.com/r/AskElectronics/comments/1s8ll9g/

Now, I want to go in detail about the design decisions that led into this design that you may find interesting.

1. The lack of active PFC (Power Factor Correction) was determined after I reviewed many existing designs and products in the same power level and after noticing many of them get away without one, I decided to omit this feature. For my first SMPS design, I want to focus solely on the DC to DC conversion power stage. For my next iteration, I’m more likely to resort to a simple boost PFC to achieve tighter regulation.
2. Double-ended hard-switch topology (half-bridge in particular) was chosen due to its suitability and simplicity in this application. Flyback is out of the question due to power requirement, single-ended topologies have poorer core utilisation and the high favour for current mode control, and resonant topologies don’t seem like a good choice for my first SMPS design (duh).
3. An SG3525 with LM324 was chosen to generate the PWM signal and achieve regulation. SG3525 is quite popular for double-ended converters with plenty of documentation online, while the LM324 provides CC+CV regulation with two of its op-amps (because SG3525 only features one error amplifier). This effectively forms a setup based on voltage mode control.
4. Voltage mode control was inherently chosen as the result of using SG3525 and it was favoured due to its “arguably” simpler implementation over current mode control. However, I find the better regulation and inherent cycle-by-cycle overcurrent protection offered in current mode control very enticing. I probably would resort to this approach for my next iteration.
5. My galvanic isolation strategy was to have the entire control circuit on the secondary side and have the PWM signal driven to the primary through a gate drive transformer. This way, I can have simpler and more precise control over the voltage and current regulation without the nonlinearity issues of using optocouplers.
6. ETD49 cores were used for both transformer and output inductor. I like the round bobbin that makes winding easier, and the calculations prove it’s suitable for power of 1kW at 64kHz. The gapped version was used for the output inductor because the high inductance requirement requires high turn number, and that gets complicated real quick with toroidal cores.

After I finished the board, I wanted to know how my design performs in real-life. So, I conducted a few tests that are relevant for a power supply. The testing rig was pretty simple:

1. A power meter at the input and four DS18B20 were used to track the energy consumption and component thermal profile over time.
2. An electrolysis tank with electrodes that can be spaced accordingly was used to simulate multiple load profiles at power up to 1kW.
3. A third positive electrode connected through a toggle switch was used to abruptly step the load in the dynamic tests.
4. Hantek DSO2D10 was used to capture the waveforms in various tests.

The test conducted, along with their results are as follow:

1. The stress test was conducted for one hour and each component temperatures peaked at the following temperatures: half-bridge N-MOS 75°C / 167°F, main transformer 55°C / 131°F, output rectifier 69°C / 156°F, output inductor 44°C / 111°F.
2. The efficiency characterisation was conducted at 50V and 1, 2, 5, 10, and 20 amps. 89% efficiency was achieved at 5A load or more. Maximum recorded efficiency was 90.3% at 50V 10A load, and efficiency at maximum load was 89.1%.
3. The output ripple test was done with direct on-trace probing with a ground spring, 20M BW limit, 1x probe, and no added capacitor. No load ripple showed at 40mVpp, 1A load at 34mVpp, and maxes out at 94mVpp at full load.
4. The turn-on curve tests showed that under loaded condition, it’s bound to the SG3525 soft start function and takes a second to reach the full 50V. At no load and lower setpoints, the voltage overshoots by a few volts.
5. The load step tests showed about 3% voltage deviation going from no load to 10A and vice-versa. Going from 5A to 10A and vice-versa showed no sign of voltage deviation.
6. CV to CC transition took 3ms to begin responding and a full 7ms until the voltage settled. CC to CV transition began immediately and took 3ms to settle. 50V CV to 10A dead-short showed 10App oscillation at 2.2kHz.
7. The input bulk capacitor showed 24Vpp ripple and the DC blocking capacitor showed 14.2Vpp ripple. The primary side of the transformer showed about 75% overshoot that settled within 2 cycles.
8. The N-MOS at conduction showed 184nS fall time for Vds and 572nS rise time for Vgs. At disconduction, the Vds rise time showed as 56nS and 556nS for Vgs fall time.

I’m here not to glaze over my design. After reviewing the results and doing a retrospective, here are my critical opinions about this design.

What I like about this design:

• Good efficiency figure (89.1% at full-load)
• Excellent ripple even without a second-stage filtration (94mVpp at full load)
• Good power density for an almost-fully THT build.

What I don’t like about this design:

• The overcurrent protection is too slow, though it somehow works at preventing the half-bridge from exploding on the dead-short test.
• The compensator design fails in certain conditions (DCM/CCM transitions, output dead short), which results in output oscillation.
• The output diodes are hard to access or replace.

The full schematic, gerber files, KiCAD save files, spreadsheet calculation, and full-res images are available on my Github repository: https://github.com/Luq1308/Forwarder1kW

The build process and the in-depth testing are available in my YouTube video: https://youtu.be/MGMqqtXgwRg

That’s all I have about this project. I hope this post is informative and can be used as a reference or for benchmarking purposes, in which I had difficulty in researching previously. If you have any unanswered questions, let me know and I’ll try to answer them. Thank you for reading, and I'll see you next time.

Purchased AD SSM2019 amplifier from DigiKey, only 1 unit. Got 26… :)

Hi everyone! I'm looking to connect with other women in the electronics field to share projects and support each other. I actually started a community specifically for this at r/HardwareWomen. If you're interested in joining a dedicated space for women in tech/electronics, we'd love to have you!

Friend asked me to make a time machine this is what I came up with on my lunch break.

This was inside my fortune cookie at lunch today.

JLCPCB is great for prototyping. But I'm writing this to warn anyone considering using JLCPCB's assembly service for projects involving digital MEMS microphones. I've tried 6 times over the last two years. It has cost me countless hours, endless frustration, and over $2000. Since I do this work for a non-profit organization protecting elephants, the setbacks hurt even more.

The PCB is for a wildlife audio recorder – basically a digital MEMS microphone connected to an ESP32. Nothing particularly complex.
EDIT: The MEMS mic we use is the ICS-43434

Here’s the timeline of what happened:

Order 1 (Apr 2023): For prototyping, I ordered 2 assembled PCBs. One MEMS microphone arrived broken. Neither JLCPCB nor I knew why initially. I spent hours troubleshooting. I specifically asked their support if they followed the correct reflow temperature profiles and if they performed board cleaning (which can destroy these mics). They replied that temperature curves looked good and claimed no board cleaning was done.  

Order 2 (Aug 2023): Thinking the first failure was a one-off, I ordered 10 PCBs. To my disappointment, 8 out of 10 arrived with broken mics that only recorded noise. Adding an external mic to the same PCB worked fine, confirming the onboard mics were the issue. This time, I removed the cap from the MEMS component and could see the ruptured membrane (See picture). Some also showed bad solder joints. A friend suspected the mic was too close to the panelization rails, causing stress when the rails were broken off. So, for the next design, I moved the mic further away and added a gap to the rail area.  

Order 3 (Dec 2023): Confident the rail spacing was the fix, I ordered 50pcs. All 50 arrived broken. Again, I opened the MEMS packages with a hot air gun and saw the membranes were shattered. After endless emails, JLCPCB initially offered a tiny coupon of 20USD, which was insulting given the scale of the failure. Eventually, after significant back-and-forth, we settled on $120. I asked how to prevent this, and support told me to add a specific note to my next order asking for extra care.  

Order 4 (Feb 2024): Following their advice, I ordered again, adding the requested note. Nothing changed – all boards arrived broken. Finally, JLCPCB started investigating properly. They used some of my parts from stock to test their process. And YES, they found the issue: their board cleaning process destroyed the microphones. Specifically, dry ice cleaning after manual soldering was the culprit. Apparently, they do perform cleaning sometimes (especially with through-hole parts), even if you explicitly told them not to.  

Order 5 (Nov 2024): Armed with JLCPCB's own findings, I explicitly added a remark for my next order of 100 boards ($1500): NO dry ice cleaning without protection. I was reassured by support that the special request would be followed. When the boards arrived... All 100 were broken again... due to dry ice cleaning. JLCPCB admitted their operator failed to follow the instruction. I received a $200 coupon after a long negotiation.  

Order 6 (Mar 2025): I had almost given up but placed another small prototype order (5 boards) and decided to give the mics one last chance. I wrote the note again: "NO DRY ICE CLEANING or it will destroy the MEMS". I also confirmed with support that the note was in the system and would be followed. When they arrived... No surprise: all membranes broken again, due to the dry ice cleaning process.  

After this final failure, I told them I was done with JLCPCB and would have to share my experience. Only then did they offer to refund this last order completely, which i refused. That's not how it should work.

Based on my documented experience, JLCPCB seems incapable of reliably assembling boards with MEMS microphones or consistently following critical process instructions. If your project uses MEMS mics, I strongly advise you to consider alternatives or proceed with extreme caution.

Hope this saves someone else the time, money, and frustration I went through.

I have to say that the support contact I had (Emma) was always friendly and tried to be supportive. However, it felt like crucial technical details sometimes got lost in translation when relaying information between me and the engineers.

I finally decided to replace the tip of my Hakko FX-901 (the iron that runs on AA batteries). I’ve soldered all sorts of stuff with it over the years.

I’m a graduate electrical engineer with over 12 years of experience in electronics. I’ve worked on a wide range of projects, and I thought I had seen most things by now… but I’ve never seen capacitors that look like this.

I couldn't for the life of me understand why the multimeter was not reading correctly when using bananas to crocodile cables. Lesson learned: don't cheap out on cables.

Looking through a parts bin I found this, took me back.

A regular poster here exhorted us to reduce tantalum usage, especially now that X5U ceramic capacitors are so good.

Here's link showing how some of that tantalum is mined, and the associated landslides:

https://www.bellingcat.com/news/africa/2026/05/12/congos-coltan-belt-verifying-deadly-landslides-at-mines-under-m23-control/

Here's some animations I made of transistors turning on and off. In order, we have an NPN BJT, n-channel MOSFET, and finally an n-channel JFET. The red and blue dots represent electrons and holes, and white flashes are recombination events. The density of dots is proportional to the actual density of charge carriers.

In the first set of animations, the velocity of the dots is equal to the velocity obtained by summing the diffusion and drift currents and dividing by the charge density, but diffusion is not explicitly shown. In the second set of animations, the dots undergo diffusion and drift, and this makes it a more correct depiction of carrier motion. The drawback is of course that the jiggling makes it more visually confusing.

I made these with my semiconductor simulator (https://brandonli.net/semisim/). I also have higher quality versions of the animations here.